A common method of propagating a video signal includes separating the signal into luminance (Y) and chrominance (C) components and processing these components in parallel. The luminance signal relates to the intensity or brightness and by FCC regulation has a range of 714 mV. The chrominance signal relates to color. Techniques for combining the luminance and chrominance signals for display on a monitor or projection on a screen are known in the art.
As the luminance signal is propagated across a scan line, changes in brightness are achieved by transitioning the luminance signal from one voltage level to another.
Referring to FIG. 1A, a diagram of an "ideal" luminance signal illustrating several upward and downward transitions is shown. FIG. 1A illustrates the horizontal blanking interval 8, the horizontal synchronization pulse 9, base black level 11 and maximum white level 13. FIG. 1A also illustrates a series of positive transitions from black to white followed by a series of negative transitions from white to black. The waveform of FIG. 1A is termed "ideal" because all of the transitions 15 have square or sharply transitioning corners. The square corners result in a crisp change in intensity between pixels along a scan line and hence a clearer or more in-focus picture.
In reality, however, the luminance signal normally does not have square cornered transitions. Referring to FIG. 1B, a typical luminance signal waveform with soft or rounded corners is shown. The rounded corners are induced from transmission equipment (that cannot process the higher harmonics that cause square corners) and transmission losses, amongst other causes.
Prior art attempts to overcome the soft or rounded transitions have included generating a correction pulse that is added to the luminance signal during a transition. U.S. Pat. No. 4,445,152, issued to Karlock describes such a device. While the device of Karlock and similar devices have beneficial aspects, they also have disadvantageous aspects. For example, Karlock utilizes a complicated circuit having a common base transistor arrangement (the clamping circuit) and a diode based clipping arrangement.
Shortcomings of this clamping/clipping circuit include that a correction pulse must be greater than approximately 0.7V to overcome V.sub.BE of the transistors and the clipping diodes provide only a single pulse amplitude cut-off level. A further problem with the common base transistor arrangement and the like is that when the board level device is reduced to an ASIC level (i.e., semiconductor implementation) the common base and like arrangements necessitate a bi-CMOS implementation which requires an additional layer of conductive material and significantly increases the cost of the ASIC (e.g., typically by more than one-third). Elimination of one or more of the transistors would permit ASIC formation using normal CMOS.
Other disadvantageous aspects of Karlock and other prior art devices include that the correction pulse may not have the proper shape (in width and/or amplitude) for a desired correction, user adjustment of the correction pulse is not provided, and clarity improvements (i.e., the addition of the correction pulse to the luminance signal) is not turned off during horizontal (H) and vertical (V) synchronization and the H and V blanking intervals. Failure to turn off the correction signal during H and V synchronization and the H and V blanking intervals may result, for example, in a signal being added to the synchronization signal that is sufficient to disrupt synchronization. In addition, the device of Karlock and those of other prior art references use an undesirably large number of components which tends to make their circuits more expensive to produce (both component cost and assembly), more likely to fail and more consumptive of real estate.